{"repo":"f4pga/f4pga-arch-defs","free":true,"listed":false,"github":"https://github.com/f4pga/f4pga-arch-defs","clone":"git clone https://github.com/f4pga/f4pga-arch-defs.git","description":"FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.","language":"Jupyter Notebook","stars":312,"topics":["fpga","ice40","sphinx","documentation","verilog","hdl","xilinx-fpga","artix","kintex7","architecture-definitions"],"license":"ISC","category":"docs-static-sites","readme_excerpt":"F4PGA Architecture Definitions This repository is focused on the development of architecture support in F4PGA. Start with the if you are looking to use the tools. This repo contains documentation of various FPGA architectures, it is currently concentrating on: Lattice iCE40 ECP5 AMD/Xilinx Series 7 (Artix, Kintex and Zynq) QuickLogic It includes: Black box part definitions Verilog To Routing architecture definitions Documentation for humans Verilog simulations The aim is to gather useful documentation (both human and machine readable) about the primitives and routing infrastructure for these architectures. We hope this enables growth in the open source FPGA tools space.","default_branch":null,"files":null,"tree":[],"storefront":"/r/f4pga","claimed":false,"request_supported":{"post":"https://gitbuyer.com/r/f4pga/f4pga-arch-defs/request-supported","requests":0},"note":"indexed from public GitHub; nothing is for sale on this page. Clone it from GitHub. Paid listings live at /search."}