{"repo":"chili-chips-ba/wireguard-fpga","free":true,"listed":false,"github":"https://github.com/chili-chips-ba/wireguard-fpga","clone":"git clone https://github.com/chili-chips-ba/wireguard-fpga.git","description":"Full-throttle, wire-speed hardware implementation of Wireguard VPN, using low-cost Artix7 FPGA with opensource toolchain. If you seek security and privacy, nothing is private in our codebase. Our door is wide open for backdoor scrutiny, be it related to RTL, embedded, build, bitstream or any other aspect of design and delivery package. Bujrum!","language":"Verilog","stars":1356,"topics":["cocotb","embedded","fpga","iss","risc-v","rtl","verilator","verilog","vpn","wireguard"],"license":"BSD-3-Clause","category":"networking-infra","readme_excerpt":"Wireguard FPGA Virtual Private Networks (VPNs) are the central and indispensable component of Internet security. They comprise a set of technologies that connect geographically dispersed, heterogeneous networks through encrypted tunnels, creating the impression of a homogenous private network on the public shared physical medium. With traditional solutions (such as OpenVPN / IPSec) starting to run out of steam, Wireguard is increasingly coming to the forefront as a modern, secure data tunneling and encryption method, one that's also easier to manage than the incumbents. Both software and hardware implementations of Wireguard already exist. However, the software performance is far below the speed of wire. The existing hardware approaches are both prohibitively expensive and based on proprietary, closed-source IP blocks and tools. This project aims to bridge these gaps with an open-source, FPGA-based implementation of Wireguard. It puts to work multiple open-source technologies: ⭐ PipelineC HLS-like ⭐ PeakRDL CSR ⭐ RISC-V CPU ⭐ VProc CoSim ⭐ OpenXC7 PNR ⭐ SV2V SystemVerilog-to-Verilog HDL converter and taps into ⭐ Verilog-Ethernet open-source IP library in order to compose a coherent hardware-software SOC for secure networking. A Glimpse into History We have contributed to the Blackwire project, which is a 100Gbps hardware implementation of Wireguard switch based on AMD/Xilinx-proprietary AlveoU50 PC-accelerator card (SmartNIC form-factor), and implementable only with proprieta","default_branch":null,"files":null,"tree":[],"storefront":"/r/chili-chips-ba","claimed":false,"request_supported":{"post":"https://gitbuyer.com/r/chili-chips-ba/wireguard-fpga/request-supported","requests":0},"note":"indexed from public GitHub; nothing is for sale on this page. Clone it from GitHub. Paid listings live at /search."}