{"repo":"Minres/DBT-RISE-RISCV","free":true,"listed":false,"github":"https://github.com/Minres/DBT-RISE-RISCV","clone":"git clone https://github.com/Minres/DBT-RISE-RISCV.git","description":"An instruction set simulator based on DBT-RISE implementing the RISC-V ISA","language":"C++","stars":37,"topics":["dbt","iss","llvm","systemc","risc-v"],"license":"BSD-3-Clause","category":"data-pipelines","readme_excerpt":"DBT-RISE-RISCV A instruction set simulator based on DBT-RISE implementing the RISC-V ISA. The project is hosted at https://github.com/Minres/DBT-RISE-RISCV . This repo contains only the code of the RISC-V ISS. A complete VP using this ISS can be found at https://github.com/Minres/RISCV-VP which models some generic RISC-V µC. Contents While this project works as a standalone appplication it is based on the DBT-RISE Framework for developing ISS. Currently part of the repository are the following implementations adhering to version 2.2 of the 'The RISC-V Instruction Set Manual Volume I: User-Level ISA': RV32I RV32IMAC RV32GC RC64I RV64GC All possible selections and backends are achitectural compliant, passing the official riscv-arch-test suite for M-mode. Along with the different ISA implementations there is a wrapper implementing the M/S/U modes including virtual memory management and CSRs as of privileged spec 1.10. The main.cpp in src allows to build a standalone ISS when integrated into a top-level project. For an example take a look at https://github.com/Minres/RISCV-VP. Last but not least a SystemC wrapper is provided to allow easy integration into SystemC based virtual platforms (e.g. https://github.com/Minres/RISCV-VP). Since DBT-RISE uses a generative approach other needed combinations or custom extension can be generated. For further information please do not hesitate to contact info@minres.com. Standalone build instructions You need to have conan newer than version 2.","default_branch":null,"files":null,"tree":[],"storefront":"/r/Minres","claimed":false,"request_supported":{"post":"https://gitbuyer.com/r/Minres/DBT-RISE-RISCV/request-supported","requests":0},"note":"indexed from public GitHub; nothing is for sale on this page. Clone it from GitHub. Paid listings live at /search."}